The present disclosure relates to a method of generating a design layout including design shapes that confine stitch-induced via structures above an underlying conductive line level, and a system for implementing the same.
Printing a lithographic pattern having pitches below lithographic limits of traditional lithographic techniques, e.g., below 80 nm, does not yield patterns with high fidelity. To overcome this problem, a multi-exposure technique in which multiple lithographic exposures are performed for a single level, can be employed. In order to implement the multi-exposure technique, a given design shape in a design level may be decomposed into multiple decomposed design shapes. The multiple decomposed design shapes are assigned to different lithographic masks that correspond to different “colors” that collectively constitute the design level. The process of decomposing design shapes into groups of decomposed design shapes corresponding to different colors is referred to as “coloring.”
A design shape in a design level can thus includes multiple decomposed shapes corresponding to different colors. The number of colors corresponds to the number of lithographic masks to be employed to print the lithographic pattern corresponding to the design shapes in the design level. Each lithographic mask includes decomposed design shapes of the same color. Each lithographic exposure adds the pattern corresponding to decomposed design shapes of a corresponding color to a hard mask layer. If performed correctly, the multiple lithographic exposures add the patterns of the decomposed design shapes of all the colors of the design level to generate the pattern of the original design shape in the design level.
To ensure that the multiple lithographic exposures result in replication of the original pattern despite overlay variations and variations in other lithographic parameters, generation of areas of overlap are built into the decomposition process. The process of generation of areas of overlap between design shapes having different colors and derived from decomposition of an original design shape in the given design level is referred to as “stitching.” An area of overlap between design shapes having different colors is referred to as a “stitching area” or a “stitch.”
Lithographic pattern transfer is implemented by transferring a pattern in a photoresist layer into a material layer by an etch process. Stitches correspond to regions in which multiple etch processes are performed in a same material layer. Thus, a region in a physical structure corresponding to a stitch are prone to be etched through due to multiple etch processes performed therein if sufficient process variations occur in the deposition of the material layer prior to lithographic processes or during the etch processes. If a region corresponding to a stitch is etched through unintentionally, a via structure is collaterally formed during a via etch process when a via structure should not be formed. Formation of such a collateral via structure can create electrical shorts in a metal interconnect structure among components that should be electrically isolated. Further, such a collateral via can be narrow and prevent deposition of a diffusion barrier layer at a thickness sufficient to prevent diffusion of metals (e.g., copper). In that case, metal can diffuse through thin portions of the diffusion barrier layer and diffuse into dielectric materials embedding metal interconnect structures or into semiconductor materials in a semiconductor substrate including semiconductor devices and cause reliability issues. Thus, a method for systematically preventing or minimizing formation of collateral via structures is desired.